SOCVP is WIOWIZ's executable model of its own Soft IP, packaged as bootable SoC solutions that run real RISC-V firmware you compile yourself. Evaluate WIOWIZ IP without waiting for an RTL drop. It models WIOWIZ silicon at the architecture level, it is not an RTL simulator.
See it run ↓ See the EDA platformEach solution boots real firmware against a modelled WIOWIZ SoC, RISC-V processors, an INT8 NPU, DMA, PCIe and CXL endpoints, a UEC NIC and DPU, and more.
A compact RISC-V microcontroller SoC, the fastest way to boot real firmware and watch it pass.
An edge-inference SoC with the INT8 NPU, driven by shipped firmware and a golden reference.
A multi-core RISC-V SoC for concurrency, coherence and system bring-up.
A data-processing SoC with networking and CXL data movement for datacenter evaluation.
Short walk-throughs of SOCVP booting and evaluating WIOWIZ silicon.
The compact RISC-V microcontroller SoC boots shipped firmware and reports a checked pass.
A multi-core RISC-V SoC brings up concurrently with coherent memory traffic.
The edge SoC runs inference on the INT8 NPU and compares it element for element against a golden reference.
The data-processing SoC drives the UEC NIC and DPU datapath end to end.
PCIe endpoint transactions move through the modelled SoC with a full transaction log.
CXL coherent memory access is exercised and checked against the expected result.
Every evaluation runs firmware and checks the result. Where a golden reference exists, the run is compared element for element.
A boot that executes an illegal instruction fails. A success flag cannot override a real fault.
The shipped package checks its own integrity and refuses to run a tampered file.
Boots are byte-for-byte deterministic. Run it ten times, diff nothing.
Delivered as a Docker bundle — the same image runs on Linux natively or on Windows via WSL2 with Ubuntu. Download, extract, build, and run. You always get the latest release.
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