Point RVP at your RTL.
Get back a
running UVM testbench.
RVP reads a SoC's RTL, wires WIOWIZ golden VIPs onto every interface it exposes, and compiles, elaborates, and runs a complete UVM environment on native FSimX, no hand-written harness.
Six autonomous steps, one command
The same flow runs on any SoC, a clean IP or a messy production netlist. Every step is deterministic and leaves a signed receipt you can diff.
Ingest the RTL
Parse the top module and resolve its port list, no YAML, no config, no manual interface list.
any SoC topFind the interfaces
Identify boundary protocols by signal shape, APB, AXI, UART, JTAG, GMII and more, including multiple ports of the same kind.
signal-levelAttach golden VIPs
Drop the matching WIOWIZ VIP onto each interface with the correct role and width, master, slave, or link partner.
golden VIP libraryClose filelist gaps
When the netlist omits a module, RVP finds the real source in the repo and stitches it back in, preferring RTL over stubs.
self-healingCompile · elaborate · run
Build the whole environment on native FSimX and start every VIP sequence, the SoC and its checkers come alive.
native fsxrunReturn a checked result
Scoreboards compare real data. The run reports QUALIFIED, INTEGRATED, or a fail-closed CHECK_FAIL, never an empty pass.
fail-closedOne golden VIP library, one format
Every protocol RVP binds comes from the same golden library, each VIP a complete UVM agent, not a stub. Add a chip with an interface we don't cover, and that VIP is built and folded back in.
Highlighted protocols auto-bind from RTL today. The rest are in the library and bind as their detectors ship, the same one-format VIP, wired the same way.
What ships in every VIP
- ›Driver & monitor, cycle-accurate, protocol-correct
- ›Sequencer & sequences, smoke, compliance, error-injection
- ›Scoreboard, real data-integrity checking, not counters
- ›Coverage & SVA, functional bins and protocol assertions
- ›Config, role, width, compliance, all set from RTL
A pass means the data was checked
RVP doesn't stop at "it compiled." VIPs drive real transactions into the DUT, scoreboards compare what came back, and the verdict is machine-enforced.
QUALIFIED Real transactions, checked
A VIP completes true bus handshakes and the scoreboard confirms the data, e.g. write a register, read it back, match. That, and only that, is a pass.
CHECK_FAIL Fail-closed by design
Corrupt one byte of the DUT and the scoreboard catches it, mismatch counted, error raised, non-zero exit. The bite is proven, not assumed.
INTEGRATED Clear on bring-up
When a DUT isn't booted, responder VIPs report activity without faking a result. RVP tells apart "not brought up yet" from "real defect."
◈ Signed, reproducible receipts
Every run emits a JSON receipt, bound VIPs, recovered modules, match/mismatch counts, verdict, so results are diffable and auditable.
Validate against production-scale SoCs
RVP has generated and run testbenches straight from the RTL of WIOWIZ SoCs across MCU + NPU, networking, and display classes, including netlists their own flows couldn't fully assemble.
One command against your top module
# generate + run a SoC UVM testbench from RTL $ rvp gen --rtl ./my_soc --top my_soc_top # point it at an existing filelist $ rvp gen --top my_soc_top \ --filelist sim/soc.f --run-cwd sim/ # verdict + signed receipt ✓ SOC_VIP_QUALIFIED → runs/<soc>/receipt.json
Request access
RVP runs on Linux x86-64 alongside native FSimX. Tell us your target SoC and interfaces and we'll send the release with a walkthrough.
What RVP is not: not a replacement for your signed-off, hand-authored verification. It stands up a complete, running, checked UVM environment in minutes so real verification starts from a live testbench, not a blank file.